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EMIF06-VID01F2
6-line IPADTM, low capacitance EMI filter and ESD protection
Features

High efficiency EMI filtering (-40 dB @ 900 MHz) Low line capacitance suitable for high speed data bus Low serial resistance for camera impedance adaptation Lead-free package Optimized PCB space occupation: 2.92 mm x 1.29 mm Very thin package: 0.65 mm High efficiency in ESD suppression on inputs pins (IEC 61000-4-2 level 4) High reliability offered by monolithic integration High reduction of parasitic elements through integration and wafer level packaging Figure 2. Figure 1.
9
(R)
Flip Chip (15 bumps)
Pin layout (bump side)
8 7 6 5 4 3 2 1
I6 Gnd O6
I5
I4 Gnd O4
I3
I2 Gnd O2
I1
A B
O5
O3
O1
C
Device configuration
R
Complies with the following standards:
IEC 61000-4-2 Level 4 on input pins - 15 kV (air discharge) - 8 kV (contact discharge) MIL STD 883E - Method 3015-6 Class 3
Input
Output
R = 100 CLINE = 16pF typ. @ 3V
Application
Where EMI filtering in ESD sensitive equipment is required:

Description
The EMIF06-VID01F2 is a 6-line highly integrated array designed to suppress EMI / RFI noise in all systems subjected to electromagnetic interference. The EMIF06-VID01F2 Flip Chip packaging means the package size is equal to the die size. Additionally, this filter includes ESD protection circuitry which prevents damage to the protected device when subjected to ESD surges up to 15 kV.
LCD and camera for mobile phones Computers and printers Communication systems MCU board
April 2008
Rev 2
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www.st.com 7
Characteristics
EMIF06-VID01F2
1
Characteristics
Table 1.
Symbol Tj Top Tstg
Absolute ratings (limiting values)
Parameter and test conditions Maximum junction temperature Operating temperature range Storage temperature range Value 125 - 40 to + 85 - 55 to + 150 Unit C C C
Table 2.
Symbol VBR IRM VRM R Cline Symbol VBR IRM R Cline
Electrical characteristics (Tamb = 25 C)
Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Series resistance between input and output Input capacitance per line Test conditions IR = 1 mA VRM = 3 V per line I = 10 mA VR = 3 V dc, 1 MHz VOSC = 30 mV 80 100 16 Min. 6 Typ. 8 Max. 10 500 120 19 Unit V nA pF
VBR VRM IR IRM IRM IR VRM VBR V I
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EMIF06-VID01F2
Characteristics
Figure 3.
0 dB -10
S21 (dB) attenuation measurement Figure 4.
0 dB -10 -20 -30
Analog crosstalk measurement
-20
-40 -50 -60
-30
-40
-70 -80
-50
-90 -100
-60 100k 1M 10M f/Hz 100M 1G
100k
1M
10M f/Hz
100M
1G
Figure 5.
ESD response to IEC 61000-4-2 Figure 6. (+15 kV air discharge) on one input (Vin) and on one output (Vout)
Input 10V/d
ESD response to IEC 61000-4-2 (-15 kV air discharge) on one input (Vin) and on one output (Vout)
Input 10V/d
Output 10V/d Output 10V/d
200ns/d
200ns/d
Figure 7.
Junction capacitance versus reverse voltage applied (typical values)
CLINE(pF)
28 26 24 22 20 18 16 14 12 10 0.0 0.5 1.0 1.5 2.0 2.5 3.0
VLINE(V)
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Ordering information scheme
EMIF06-VID01F2
2
Ordering information scheme
Figure 8. Ordering information scheme
EMIF
EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip Chip x = 2: Lead-free, pitch = 500 m, bump = 315 m
yy
-
xxx zz
Fx
3
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 9. Flip Chip package dimensions
315 m 50
435 m 50
500 m 50 250 m 50
210 m
650 m 65
50 1
m
5
210 m 2.92 mm 50 m
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1.29 mm 50 m
0
EMIF06-VID01F2
Package information
Figure 10. Footprint recommendations
Figure 11. Marking
Copper pad diameter: 250 m recommended, 300 m max
Dot, ST logo xx = marking z = manufacturing location yww = date code (y = year ww = week)
E
Solder stencil opening: 330 m
Solder mask opening recommendation: 340 m min for 300 m copper pad diameter
xxz yww
Figure 12. Flip Chip tape and reel specification
Dot identifying Pin A1 location 4 0.1 O 1.5 0.1
1.75 0.1 3.5 0.1
1.52
0.73 0.05
All dimensions in mm
8 0.3
STE
STE
STE
xxx yww
User direction of unreeling
xxx yww
xxx yww
4 0.1
3.0
Note:
More packing information is available in the application note AN1235: "Flip Chip: Package description and recommendations for use" AN1751: "EMI Filters: Recommendations and measurements"
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Ordering information
EMIF06-VID01F2
4
Ordering information
Table 3. Ordering information
Marking GR Package Flip Chip Weight 5.4 mg Base qty 5000 Delivery mode Tape and reel 7"
Order code EMIF06-VID01F2
5
Revision history
Table 4.
Date 15-Feb-2005 28-Apr-2008
Document revision history
Revision 1 2 First issue. Added ECOPACK statement. Updated Figure 9, Figure 11, and Figure 12. Reformatted to current standards. Changes
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EMIF06-VID01F2
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